LSU ECE Professor Receives Two Patents on GPUs
July 14, 2020
BATON ROUGE, LA – LSU Electrical and Computer Engineering Professor Lu Peng and his
former PhD student Sui Chen recently received two patents dealing with graphical processing
units (GPUs), which are specialized electronic chips originally designed to rapidly
manipulate and accelerate the processing of images such as those seen on mobile phones,
personal computers, workstations, game consoles, and also widely used for general-purpose
computing.
“Both patents are for enhancing the performance and programmability of GPUs,” Peng said. “Recently, GPUs are used in many areas such as High-Performance Computing and Deep Learning with thousands of threads running concurrently. On the other hand, handling the large number of threads correctly is not an easy job. This blocks the productivity of software developers.
“In these two patents, we introduce hardware transactional memory that is a complex conflict-detection system and remains as a black box to the programmer but guarantees forward progress and, thus, deadlocks cannot arise. This will improve the programmability and maintain high performance for GPUs.”
Their first patent is for research titled, “Enhanced Performance for Graphical Processing Unit Transactional Memory.” The computing system includes a plurality of Single Instruction Multiple Thread (SIMT) cores and a conflicting address table (CAT) for each core. The CAT stores word addresses for reads and writes correlated with flags indicating whether a corresponding word is written or read by a committing transaction.
The CATs for different SIMT cores are coupled together by an interconnect. A commit unit (CU) is coupled to the SIMT cores and is configured to validate transactions. The cores access its CAT to access a first address of data affected by a first transaction to be committed at the CU. The first address is compared to a second address affected by a second transaction. When the first address matches the second address, the core delays or prevents committing the first transaction at the CU by pausing the first transaction or aborting the first transaction.
Their second patent is titled, “Snapshot Isolation in Graphical Processing Unit Hardware Transactional Memory.”
“Snapshot Isolation (SI) is an established model in the database community, which permits write-read conflicts to pass and aborts transactions only on write-write conflicts,” Peng said. “With the Write Skew Anomaly (WSA) correctly eliminated, SI can reduce the occurrence of aborts, save the work done by transactions, and greatly benefit long transactions involving complex data structures.”
Embodiments include a multi-versioned memory subsystem for hardware-based transactional memory (HTM) on the GPU, with a method for eliminating the WSA on the fly, and incorporates SI. The GPU HTM can provide reduced compute time for many compute tasks.
Both patents were possible thanks to research that was supported in part by the National Science Foundation.
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Contact: Libby Haydel
Communications Specialist