Vaidyanathan Awarded Patent for Reconfigurable Circuit

June 19, 2019

Ramachandran Vaidyanathan headshotBATON ROUGE, LA – LSU Electrical Engineering Professor Ramachandran Vaidyanathan was recently granted a patent for “Architecture for configuration of a reconfigurable integrated circuit,” the third in a series for technology related to configuring elements in a chip.

Arash Ashrafi, a 2016 master’s graduate in electrical engineering from LSU and currently a graphics ASIC design engineer at Qualcomm, is co-inventor on the patent.

Reconfigurable devices, such as field-programmable gate arrays, or FPGAs, have moved into a more mainstream role in today’s computing landscape. For example, they can now be found in embedded systems, network security, video processing and as accelerators in high-performance computing.

They, and other reconfigurable devices, conventionally include dedicated input/output pins for conveying and coordinating the input of configuration bits to reconfigure the device. As the number of those pins is typically limited and valuable, the number dedicated to receiving configuration bits may also be limited.

What Vaidyanathan and Ashrafi’s technology does is generate a data path through selected configuration state memory units and bypass the unselected ones, thereby removing the bottleneck of communication.


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